Engineers Recruitment

  • Physical Design Engineer

    One of our reputed client in Singapore is looking for Physical Design Engineer

    Position: Physical Design Engineer

    Responsibilities:
    (*) Fully responsible for Netlist-to-GDS physical design implementation of low power chips

    Requirements:
    (*) Knowledge of complete Netlist-to-GDS flow, including floor planning, power-grid synthesis, place opt. and routing, CTS, timing closure, signal integrity, STA, and physical verification
    (*) Knowledge of Synopsys/Cadence tools like ICC or Encounter
    (*) Expertise in low power design implementation or flow development
    (*) Expertise in hierarchical design implementation is a plus
    (*) Good in script programming with Perl, TCL/TK or other languages
    (*) Candidates who have experience in the companies like QUALCOMM, BROADCOM, INTEL, FREESCALE, BROCADE, JUNIPAR, NVIDIA, INFONEON, TAMTIG, STMI, ETC... will be given preference

    Qualification: Bachelor/Masters Degree in Electrical/Computer/Any Engineering

    Expereince: Minimum 3 Years

    Attractive Salary – Minimum Basic would be S$3000 (Approximately INR 1,50,000 per Month) To S$6000 (Approximately INR 3,00,000 per Month) depending on Experience/Caliber it will be varied.

    Visa Type: "EP" (Employment Pass) - 100% renewable

    Screening Method:
    1st Level – CV Selection
    2nd Level – Candidates who’s CV was shortlisted will be scheduled for Direct Interview

    Note: Only Scheduled Interview – No Walk-ins Allowed.
    Rush your CV to geetha@globalplacementcentre.com to get Scheduled for the January 2014 Interview (Confirmed)
    So send the CV ASAP to avoid last minute hassel

  • Design Verification Engineer

    One of our reputed client in Singapore is looking for Design Verification Engineer

    Position: Design Verification Engineer

    Responsibilities:

    (*) Constrained-Random Verification using SystemVerilog
    (*) Develop verification environment for DUT
    (*) Write and debug tests for DUT using SystemVerilog, Perl, and C.
    (*) Develop Bus Functional Model(BFM) or using Verification IP(VIP) for tests.
    (*) Developing and reviewing test plans
    (*) Write coverage monitors to evaluate the coverage of the DUT.
    (*) Formal verification using SystemVerilog Assertion to verify SOC or IP is plus

    Requirements:

    (*) Experience on SystemVerilog/VMM/OVM/UVM (UVM is plus)
    (*) Familiarity with transaction-level verification at higher-level of abstractions is plus.
    (*) Experiences in developing measurable verification plan.
    (*) Proficiency in UNIX scripting languages and utilities such as csh, sed, awk, and Perl.
    (*) Candidates who have experience in the companies like QUALCOMM, BROADCOM, INTEL, FREESCALE, BROCADE, JUNIPAR, NVIDIA, INFONEON, TAMTIG, STMI, ETC... will be given preference

    Qualification: Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering

    Expereince: Minimum 3 Years

    Attractive Salary – Minimum Basic would be S$3000 (Approximately INR 1,50,000 per Month) To S$6000 (Approximately INR 3,00,000 per Month) depending on Experience/Caliber it will be varied.

    Visa Type: "EP" (Employment Pass) - 100% renewable

    Screening Method:
    1st Level – CV Selection
    2nd Level – Candidates who’s CV was shortlisted will be scheduled for Direct Interview

    Note: Only Scheduled Interview – No Walk-ins Allowed.
    Rush your CV to geetha@globalplacementcentre.com to get Scheduled for the January 2014 Interview (Confirmed)
    So send the CV ASAP to avoid last minute hassel